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lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 lmv881 23 mhz low power cmos emi hardened operational amplifier with 1.8v logic shutdown check for samples: lmv881 1 features applications 2 ? unless otherwise noted, typical values at t a ? weight scale systems = 25 c, v + = 3.3v ? filters/buffers ? supply voltage 2.7v to 5.5v ? medical diagnosis equipment ? supply current 1.65 ma description the lmv881 is a low power cmos input operational ? shutdown current 200 pa amplifier that provides low input bias currents, a rail ? input offset voltage 1 mv max to rail output with high output drive capability and a ? input bias current 0.1 pa wide temperature range of ? 40 c to +125 c. additionally, the lmv881 is emi hardened to ? gbw 23 mhz minimize sensitivity to external interference. ? emirr at 1.8 ghz 105 db the lmv881 has a maximum input offset voltage of 1 ? input noise voltage at 1 khz 9 nv/ hz mv with an input common-mode voltage range that ? slew rate 12 v/ s includes ground. over an operating supply range ? output voltage swing rail-to-rail from 2.7v to 5.5v, the lmv881 provides a typical psrr of 110db and a cmrr of 110db. this makes ? output current drive 70 ma the lmv881 ideal for emi sensitive applications as ? operating ambient temperature range ? 40 c well as exceptional performance as a robust general to 125 c purpose part. ? space saving micro-uqfn package 1.5 x 1.0 x the unity gain stable lmv881 features 23 mhz of 0.5 mm bandwidth while consuming only 1.65 ma of current. this device also maintains stability for capacitive loads as large as 200 pf. typical application figure 1. emi hardened sensor application 1 please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 all trademarks are the property of their respective owners. production data information is current as of publication date. copyright ? 2012 ? 2013, texas instruments incorporated products conform to specifications per the terms of the texas instruments standard warranty. production processing does not necessarily include testing of all parameters. sensor + - + - adc pressure emi hardened emi hardened + - v + r1 r2 interfering rf sources no rf related disturbances
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com description (continued) lmv881 offers a shutdown pin that can be used to disable the device and reduce the supply current to sub- nanoamp levels. during shutdown, the output is hard-clamped to v- to provide a known output state. the shutdown input thresholds are set for 1.8v logic, regardless of the amplifiers supply voltage. this eliminates the need for additional logic level shifting circuitry or translators. the lmv881 is offered in the space saving 6-pin uqfn package and provides excellent performance and economy in terms of power and space usage. connection diagram 6-pad uqfn package see package number nkk0006a these devices have limited built-in esd protection. the leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the mos gates. 2 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 bottom view top view v+ 65 4 1 in+ 2 v- 3 in - out sd 6 5 3 2 1 4 v+ out sd in+ in - v-
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 absolute maximum ratings (1) (2) human body model 2 kv esd tolerance (3) charge-device model 1 kv machine model 200v v in differential supply voltage supply voltage (v s = v + ? v ? ) 6v v + +0.4v voltage at input/output pins v ? ? 0.4v storage temperature range ? 65 c to +150 c junction temperature (4) +150 c for soldering specifications http://www.ti.com/lit/snoa549 (1) absolute maximum ratings indicate limits beyond which damage to the device may occur. operating ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. for specifications and the test conditions, see the electrical characteristics tables. (2) if military/aerospace specified devices are required, please contact the texas instruments sales office/distributors for availability and specifications. (3) human body model, applicable std. mil-std-883, method 3015.7. machine model, applicable std. jesd22-a115-a (esd mm std. of jedec) field-induced charge-device model, applicable std. jesd22-c101-c (esd ficdm std. of jedec). (4) the maximum power dissipation is a function of t j(max) , ja and t a . the maximum allowable power dissipation at any ambient temperature is p d = (t j(max) - t a )/ ja . all numbers apply for packages soldered directly onto a pc board. operating ratings (1) temperature range (2) ? 40 c to +125 c supply voltage (v s = v + ? v ? ) 2.7v to 5.5v package thermal resistance ( ja (2) ) 6-pad uqfn 335 c/w (1) absolute maximum ratings indicate limits beyond which damage to the device may occur. operating ratings indicate conditions for which the device is intended to be functional, but specific performance is not ensured. for specifications and the test conditions, see the electrical characteristics tables. (2) the maximum power dissipation is a function of t j(max) , ja and t a . the maximum allowable power dissipation at any ambient temperature is p d = (t j(max) - t a )/ ja . all numbers apply for packages soldered directly onto a pc board. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 3 product folder links: lmv881
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com 3.3v electrical characteristics (1) unless otherwise specified, all limits are specified for t a = 25 c, v + = 3.3v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2. boldface limits apply at the temperature extremes. parameter test conditions min (2) typ (3) max (2) units v os input offset voltage (4) 273 1000 v 1260 tcv os input offset voltage temperature drift (5) 0.7 2.6 v/ c i b input bias current (5) 0.1 30 pa 500 i os input offset current 1 pa cmrr common-mode rejection ratio (4) 0.2v v cm v + - 1.2v 77 93 db 76 psrr power supply rejection ratio (4) 2.7v v + 5.5v, 79 95 db v out = 1v 78 emirr emi rejection ratio, in+ and in ? (6) v rf_peak = 100 mv p ( ? 20 dbv p ), 70 f = 400 mhz v rf_peak = 100 mv p ( ? 20 dbv p ), 80 f = 900 mhz db v rf_peak = 100 mv p ( ? 20 dbv p ), 105 f = 1800 mhz v rf_peak = 100 mv p ( ? 20 dbv p ), 110 f = 2400 mhz cmvr input common-mode voltage range cmrr 65 db ? 0.2 2.2 v ? 0.1 2.1 a vol large signal voltage gain (7) r l = 2 k ? 99 110 v out = 0.15v to 1.65v, 98 v out = 3.15v to 1.65v db r l = 10 k ? 102 112 v out = 0.1v to 1.65v, 101 v out = 3.2v to 1.65v v out output voltage swing high r l = 2 k ? to v + /2 12 14 18 r l = 10 k ? to v + /2 3 4 5 mv from either rail output voltage swing low r l = 2 k ? to v + /2 8 12 16 r l = 10 k ? to v + /2 2 4 5 i out output short circuit current sourcing, v out = v cm , 61 70 v in = 100 mv 52 ma sinking, v out = v cm , 72 86 v in = ? 100 mv 58 r out shutdown output resistance v sdn = 0v 8.5 ohms v osd shutdown output voltage v sdn = 0v, 134 230 mv 200 ? pullup from out to v+ (1) electrical table values apply only for factory testing conditions at the temperature indicated. factory testing conditions result in very limited self-heating of the device such that t j = t a . no guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where t j > t a . (2) limits are 100% production tested at 25 c. limits over the operating temperature range are specified through correlations using statistical quality control (sqc) method. (3) typical values represent the most likely parametric norm as determined at the time of characterization. actual typical values may vary over time and will also depend on the application and configuration. the typical values are not tested and are not specified on shipped production material. (4) the typical value is calculated by applying the absolute value transform to the distribution, then taking the statistical average of the resulting distribution. (5) this parameter is ensured by design and/or characterization and is not tested in production. (6) the emi rejection ratio is defined as emirr = 20log ( v rf_peak / v os ). (7) the specified limits represent the lower of the measured values for each output range condition. 4 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 3.3v electrical characteristics (1) (continued) unless otherwise specified, all limits are specified for t a = 25 c, v + = 3.3v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2. boldface limits apply at the temperature extremes. parameter test conditions min (2) typ (3) max (2) units v en turn-on voltage (8) 1 1.5 v turn-off voltage (8) 0.3 0.7 i s supply current active, 1.65 2.17 ma v sd > 0.972 v 2.75 in shutdown, 200 pa v sd < 0.676 v sr slew rate (9) a v = +1, v out = 1 v pp , 12 v/ s 10% to 90% gbw gain bandwidth product 23 mhz m phase margin 60 deg e n input referred voltage noise density f = 1 khz 9 nv/ hz f = 100 khz 5.3 i n input referred current noise density f = 1 khz 0.015 pa/ hz c in common-mode input capacitance 5 pf differential-mode input capacitance 15 thd+n total harmonic distortion + noise f = 1 khz, a v = 1, bw 500 khz 0.02 % (8) the shutdown logic levels are fixed to match 1.8v logic levels (referenced to v-), and do not change with the total power supply voltage. (9) number specified is the slower of positive and negative slew rates. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 5 product folder links: lmv881
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com 5v electrical characteristics (1) unless otherwise specified, all limits are specified for t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2. boldface limits apply at the temperature extremes. parameter test conditions min (2) typ (3) max (2) units v os input offset voltage (4) 273 1000 v 1260 tcv os input offset voltage temperature drift (5) 0.7 2.6 v/ c i b input bias current (5) 0.1 30 pa 500 i os input offset current 1 pa cmrr common-mode rejection ratio (4) 0v v cm v + ? 1.2v 79 94 db 78 psrr power supply rejection ratio (4) 2.7v v + 5.5v, 79 95 db v out = 1v 78 emirr emi rejection ratio, in+ and in ? (6) v rf_peak = 100 mv p ( ? 20 dbv p ), 70 f = 400 mhz v rf_peak = 100 mv p ( ? 20 dbv p ), 80 f = 900 mhz db v rf_peak = 100 mv p ( ? 20 dbv p ), 105 f = 1800 mhz v rf_peak = 100 mv p ( ? 20 dbv p ), 110 f = 2400 mhz cmvr input common-mode voltage range cmrr 65 db ? 0.2 3.9 v ? 0.1 3.8 a vol large signal voltage gain (7) r l = 2 k ? 102 110 v out = 0.15v to 2.5v, 101 v out = 4.85v to 2.5v db r l = 10 k ? 102 113 v out = 0.1v to 2.5v, 101 v out = 4.9v to 2.5v v out output voltage swing high r l = 2 k ? to v + /2 13 15 19 r l = 10 k ? to v + /2 3 4 5 mv from either rail output voltage swing low r l = 2 k ? to v + /2 10 14 18 r l = 10 k ? to v + /2 3 4 5 i out output short circuit current sourcing, v out = v cm , 90 110 v in = 100 mv 86 ma sinking, v out = v cm , 90 110 v in = ? 100 mv 86 r out shutdown output resistance v sdn = 0v 7 ohms v osd shutdown output voltage v sdn = 0v, 169 260 mv 200 ? pullup from out to v+ (1) electrical table values apply only for factory testing conditions at the temperature indicated. factory testing conditions result in very limited self-heating of the device such that t j = t a . no guarantee of parametric performance is indicated in the electrical tables under conditions of internal self-heating where t j > t a . (2) limits are 100% production tested at 25 c. limits over the operating temperature range are specified through correlations using statistical quality control (sqc) method. (3) typical values represent the most likely parametric norm as determined at the time of characterization. actual typical values may vary over time and will also depend on the application and configuration. the typical values are not tested and are not specified on shipped production material. (4) the typical value is calculated by applying the absolute value transform to the distribution, then taking the statistical average of the resulting distribution. (5) this parameter is ensured by design and/or characterization and is not tested in production. (6) the emi rejection ratio is defined as emirr = 20log ( v rf_peak / v os ). (7) the specified limits represent the lower of the measured values for each output range condition. 6 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 5v electrical characteristics (1) (continued) unless otherwise specified, all limits are specified for t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2. boldface limits apply at the temperature extremes. parameter test conditions min (2) typ (3) max (2) units v en turn-on voltage (8) 1 1.5 v turn-off voltage (8) 0.3 0.7 i s supply current v sd > 0.972 v 1.9 2.45 ma 2.95 in shutdown, 200 pa v sd < 0.676 v sr slew rate (9) a v = +1, v out = 2v pp , 12 v/ s 10% to 90% gbw gain bandwidth product 23 mhz m phase margin 61 deg e n input referred voltage noise density f = 1 khz 9 nv/ hz f = 100 khz 5.5 i n input referred current noise density f = 1 khz 0.015 pa/ hz c in common-mode input capacitance 5 pf differential-input capacitance 15 thd+n total harmonic distortion + noise f = 1 khz, a v = 1, bw 500 khz 0.02 % (8) the shutdown logic levels are fixed to match 1.8v logic levels (referenced to v-), and do not change with the total power supply voltage. (9) number specified is the slower of positive and negative slew rates. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 7 product folder links: lmv881
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com typical performance characteristics at t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2, unless otherwise specified. input bias current input bias current vs. vs. v cm at 25 c v cm at 85 c figure 2. figure 3. input bias current supply current vs. vs. v cm at 125 c supply voltage figure 4. figure 5. output swing high output swing high vs. vs. supply voltage r l = 2 k ? supply voltage r l = 10 k ? figure 6. figure 7. 8 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 supply voltage (v) v out from rail high (mv) 20 15 10 50 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40c 25c 85c 125c r l = 2k supply voltage (v) v out from rail high (mv) 54 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40c 25c 85c 125c r l = 10k 2.5 3.0 3.5 4.0 4.5 5.0 5.5 1.0 1.2 1.4 1.6 1.8 2.0 2.2 supply current (ma) supply voltage (v) +125c +25c -40c +85c v cm (v) i bias (pa) 500 400 300 200 100 0 -100 -200 -300 -400 -500 -1 0 1 2 3 4 5 6 3.3v 5.0v t a = 125c v cm (v) i b (pa) 54 3 2 1 0 -1-2 -3 -4 -5 -1 0 1 2 3 4 5 6 3.3v 5v t a = 25c v cm (v) i bias (pa) 50 40 30 20 10 0 -10 -20 -30 -40 -50 -1 0 1 2 3 4 5 6 3.3v 5.0v t a = 85c
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 typical performance characteristics (continued) at t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2, unless otherwise specified. output swing low output swing low vs. vs. supply voltage r l = 2 k ? supply voltage r l = 10 k ? figure 8. figure 9. output voltage swing output voltage swing vs. vs. load current at 3.3v load current at 5v figure 10. figure 11. open loop gain open loop gain vs. vs. capacitive load at 3.3v capacitive load at 5v figure 12. figure 13. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 9 product folder links: lmv881 100k 1m 10m 100m phase () 135 90 45 0 -45 frequency (hz) open loop gain (db) 60 40 20 0 -20 200 pf gain cl = 20, 50, 100 & 200 pf rl=10 m : 20 pf phase i load (ma) v out from rail (v) 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 10 20 30 40 50 60 70 80 -40c source 125c source -40c 125c sink v + = 3.3v i load (ma) v out from rail (v) 1.0 0.8 0.6 0.4 0.2 0 -0.2 -0.4 -0.6 -0.8 -1.0 0 10 20 30 40 50 60 70 80 -40c 125c v + = 5.0v source -40c 125c sink supply voltage (v) v out from rail low (mv) 20 15 10 50 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40c 25c 85c 125c r l = 2k supply voltage (v) v out from rail low (mv) 54 3 2 1 0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 -40c 25c 85c 125c r l = 10k 100k 1m 10m 100m phase () 135 90 45 0 -45 frequency (hz) open loop gain (db) 60 40 20 0 -20 200 pf gain cl = 20, 50, 100 & 200 pf rl=10 m : 20 pf phase
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com typical performance characteristics (continued) at t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2, unless otherwise specified. psrr cmrr vs. vs. frequency frequency figure 14. figure 15. large signal step response at v s = 3.3v large signal step response at v s = 5v figure 16. figure 17. turn-on time slew rate vs vs. supply voltage supply voltage figure 18. figure 19. 10 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 2.5 3.0 3.5 4.0 4.5 5.0 10 11 12 13 14 15 16 17 18 19 20 slew rate (v/ s) supply voltage (v) neg pos rl=10k cl=5pf 2.5 3.0 3.5 4.0 4.5 5.0 supply voltage (v) turn on time ( s) 2.5 2.3 2.0 1.8 1.5 1.3 1.0 0.0 0.2 0.4 0.6 0.8 1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 output voltage (v) time ( s) rl=10k cl=20pf av=+1 0.0 0.2 0.4 0.6 0.8 1.0 -0.8 -0.6 -0.4 -0.2 0.0 0.2 0.4 0.6 0.8 output voltage (v) time ( s) rl=10k cl=20pf av=+1 10 100 1k 10k 100k 1m 10m 0 20 40 60 80 100 120 psrr (db) frequency (hz) 5v 3.3v 5v 3.3v +psrr -psrr 100 1k 10k 100k 1m 10m 40 50 60 70 80 90 100 110 120 cmrr (db) frequency (hz) vs = 3.3v and 5v
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 typical performance characteristics (continued) at t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2, unless otherwise specified. input voltage noise thd+n vs. vs. frequency frequency figure 20. figure 21. thd+n emirr in+ vs. vs. amplitude power at 400 mhz figure 22. figure 23. emirr in+ emirr in+ vs. vs. power at 900 mhz power at 1800 mhz figure 24. figure 25. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 11 product folder links: lmv881 rf input peak voltage (dbvp) emirr v_peak (db) 120 110 100 90 80 70 60 50 40 30 20 -40 -30 -20 -10 0 10 -40c 25c 125c 85c f rf = 900 mhz rf input peak voltage (dbvp) emirr v_peak (db) 120 110 100 90 80 70 60 50 40 30 20 -40 -30 -20 -10 0 10 -40c 25c 125c 85c f rf = 1800 mhz rf input peak voltage (dbvp) emirr v_peak (db) 120 110 100 90 80 70 60 50 40 30 20 -40 -30 -20 -10 0 10 -40c 25c 125c 85c f rf = 400 mhz 10m 100m 1 10 v out (vpp) thd+n (%) 10 1 0.1 0.01 0.001 0.0001 f = 1 khz bw = 20 khz av = +10 av = +1 r l = 10 k : v s = 3.3v v s = 5v 100m 1 10 100 1k 10k 100k 1m 1 10 100 1k noise (nv/ ) frequency (hz) 3.3v and 5v 10 100 1k 10k 100k frequency (hz) thd+n (%) 0.1 0.01 0.001 v out = 1v pp bw = 500 khz r l = 10 k : v s = 3.3v & 5v a v = +1 a v = +10
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com typical performance characteristics (continued) at t a = 25 c, v + = 5v, v ? = 0v, v cm = v + /2, and r l =10 k ? to v + /2, unless otherwise specified. emirr in+ emirr in+ vs. vs. power at 2400 mhz frequency figure 26. figure 27. 12 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 rf input peak voltage (dbvp) emirr v_peak (db) 120 110 100 90 80 70 60 50 40 30 20 -40 -30 -20 -10 0 10 -40c 25c 125c 85c f rf = 2400 mhz frequency (mhz) emirr v_peak (db) 120 110 100 90 80 70 60 50 40 30 20 10 100 1000 10000 125c 85c 25c v peak = -20dbvp v + = 3.3v, 5.0v v rf peak = -20 dbvp -40c
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 application information introduction the lmv881 is an operational amplifier with low offset, low noise and a high current rail-to-rail output. these specifications make the lmv881 great choices for medical and instrumentation applications such as diagnosis equipment and power line monitors. the low supply current and 1.8v shutdown logic is perfect for battery powered equipment. the small package make this device a perfect choice for portable electronics. additionally, the emi hardening makes the lmv881 a must for applications that are exposed to radio frequency (rf) signals such as the signals transmitted by mobile phones or wireless computer peripherals. the lmv881 will effectively reduce disturbances caused by rf signals to a level that will be hardly noticeable. this again reduces the need for additional filtering and shielding. using this emi resistant op amp will thus reduce the number of components and space needed for applications that are affected by emi, and will help applications, not yet identified as possible emi sensitive, to be more robust for emi. shutdown mode to conserve battery life in portable applications, the lmv881 can be disabled when the shutdown pin voltage is pulled low. the shutdown pin is designed for 1.8v logic levels, with thresholds independent of total supply voltage. in shutdown mode, the amplifier is disabled and the output is hard-clamped by an internal mosfet to v ? to provide a known output state. care must be taken not to exceed the maximum output sinking current (specified in the electrical table) during shutdown. the shutdown pin input thresholds are referenced to the v- pin, and may need to be level shifted in split supply applications. continuous voltages between 0.9v and 1.1v on the shutdown pins should be avoided to prevent excessive supply current draw due to internal shoot-through currents. the shutdown pin cannot be left unconnected. in case shut down operation is not needed, the shutdown pin should be connected to v+ for normal operation. leaving the shutdown pin floating will result in an undefined operation modes, either shutdown or active, or even oscillating between the two modes. input characteristics the input common mode voltage range of the lmv881 includes ground, and can even sense well below ground. the cmrr level does not degrade for input levels up to 1.2v below the positive supply voltage. for a supply voltage of 5v, the maximum voltage that should be applied to the input for best cmrr performance is thus 3.8v. when not configured as unity gain, this input limitation will usually not degrade the effective signal range. the output is rail-to-rail and therefore will introduce no limitations to the signal range. the typical offset is only 70 v and the tcv os is 0.7 v/ c, placing the specifications close to that of precision op amps. input capacitance the lmv881's input capacitance is larger than most typical op-amps due to the internal emirr circuitry. the differential mode capacitance (capacitance between the two input pins) is about 15pf. the common mode capacitance ( ? stray ? input capacitance) is about 5pf on each input pin to the supplies. this extra input capacitance will cause peaking to occur with source impedances above 10k . the effect of source resistance on the peaking is shown in figure 28 below, where the source resistance is effectively the value of r f . copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 13 product folder links: lmv881
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com figure 28. effect of source resistance on peaking the 15pf differential mode capacitance mostly cancels due to the feedback bootstrapping effect at lower frequencies, but there still remains about 8pf of equivalent capacitance on each pin as seen by the circuit. the designer should be aware of this capacitance and make the appropriate adjustments to their circuit. output characteristics during shutdown, the output is hard-clamped to v- with a resistance of just a few ohms. in normal operation, the output is rail-to-rail. when loading the output with a 10 k ? resistor the maximum swing of the output is typically 3 mv from the positive and negative rail. the output of the lmv881 can typically drive peak currents up to 70 ma at 3.3v, and even up to 110 ma at 5v. however, power dissipation in small packages can become an issue at high drive currents. the lmv881 can be connected as a non-inverting unity gain amplifier ( ? buffer ? ). this configuration is the most sensitive to capacitive loading. the combination of a capacitive load placed at the output of an amplifier along with the amplifier ? s output impedance creates a phase lag, which reduces the phase margin of the amplifier. if the phase margin is significantly reduced, the response will be under damped which causes peaking in the transfer and, when there is too much peaking, the op amp might start oscillating. the lmv881 can directly drive capacitive loads up to 200 pf without any stability issues. in order to drive heavier capacitive loads, an isolation resistor, r iso , should be used, as shown in figure 29 . by using this isolation resistor, the capacitive load is isolated from the amplifier ? s output, and hence, the pole caused by c l is no longer in the feedback loop. the larger the value of r iso , the more stable the amplifier will be. if the value of r iso is sufficiently large, the feedback loop will be stable, independent of the value of c l . however, larger values of r iso result in reduced output swing and reduced output current drive. figure 29. isolating capacitive load a resistor value of around 50 ? would be sufficient. as an example some values are given in the following table, for 5v and an open loop gain of 111 db. c load r iso 300 pf 62 ? 400 pf 55 ? 500 pf 50 ? 14 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 + - v out v in r iso c l 100k 1m 10m 100m frequency (hz) normalized bandwidth (db) 21 18 15 12 96 3 0 -3 v out = 200 mv pp r l = 1 m : v s = 3.3v r f = 0 r f = 100 : r f = 1 k : r f = 10 k :
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 when increasing the closed-loop gain the capacitive load can be increased even further. with a closed loop gain of 2 and a 27 ? isolation resistor, the load can be 1 nf emirr with the increase of rf transmitting devices in the world, the electromagnetic interference (emi) between those devices and other equipment becomes a bigger challenge. the lmv881 is a emi hardened op amp which is specifically designed to overcome electromagnetic interference. along with emi hardened op amps, the emirr parameter is introduced to unambiguously specify the emi performance of an op amp. this section presents an overview of emirr. a detailed description on this specification for emi hardened op amps can be found in application note an-1698 . the dimensions of an op amp ic are relatively small compared to the wavelength of the disturbing rf signals. as a result, the op amp itself will hardly receive any disturbances. the rf signals interfering with the op amp are dominantly received by the pcb and wiring connected to the op amp. the received rf signals on the pins of the op amp can be represented by voltages and currents. this representation significantly simplifies the unambiguous measurement and specification of the emi performance of an op amp. rf signals interfere with op amps via the non-linearity of the op amp circuitry. this non-linearity results in the detection of the so called out-of-band signals. the obtained effect is that the amplitude modulation of the out-of- band signal is downconverted into the base band. this base band can easily overlap with the band of the op amp circuit. as an example figure 30 depicts a typical output signal of a unity-gain connected op amp in the presence of an interfering rf signal. clearly the output voltage varies in the rhythm of the on-off keying of the rf carrier. figure 30. offset voltage variation due to an interfering rf signal emirr definition to identify emi hardened op amps, a parameter is needed that quantitatively describes the emi performance of op amps. a quantitative measure enables the comparison and the ranking of op amps on their emi robustness. therefore the emi rejection ratio (emirr) is introduced. this parameter describes the resulting input-referred offset voltage shift of an op amp as a result of an applied rf carrier (interference) with a certain frequency and level. the definition of emirr is given by: where ? v rf_peak is the amplitude of the applied un-modulated rf signal (v) ? v os is the resulting input-referred offset voltage shift (v) (1) the offset voltage depends quadratically on the applied rf level, and therefore, the rf level at which the emirr is determined should be specified. the standard level for the rf signal is 100 mv p . application note an-1698 addresses the conversion of an emirr measured for an other signal level than 100 mv p . the interpretation of the emirr parameter is straightforward. when two op amps have emirrs which differ by 20 db, the resulting error signals when used in identical configurations, differs by 20 db as well. so, the higher the emirr, the more robust the op amp. copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 15 product folder links: lmv881 rf signal v out opamp (a v = 1) no rf rf v os + v detected v os ' v os v rf_peak emirr v rf_peak = 20 log ? ? 1 ?
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com coupling an rf signal to the in+ pin each of the op amp pins can be tested separately on emirr. in this section the measurements on the in+ pin (which, based on symmetry considerations, also apply to the in- pin) are discussed. in application note an-1698 the other pins of the op amp are treated as well. for testing the in+ pin the op amp is connected in the unity gain configuration. applying the rf signal is straightforward as it can be connected directly to the in+ pin. as a result the rf signal path has a minimum of components that might affect the rf signal level at the pin. the circuit diagram is shown in figure 31 . the pcb trace from rf in to the in+ pin should be a 50 ? stripline in order to match the rf impedance of the cabling and the rf generator. on the pcb a 50 ? termination is used. this 50 ? resistor is also used to set the bias level of the in+ pin to ground level. for determining the emirr, two measurements are needed: one is measuring the dc output level when the rf signal is off; and the other is measuring the dc output level when the rf signal is switched on. the difference of the two dc levels is the output voltage shift as a result of the rf signal. as the op amp is in the unity gain configuration, the input referred offset voltage shift corresponds one-to-one to the measured output voltage shift. figure 31. circuit for coupling the rf signal to in+ cell phone call the effect of electromagnetic interference is demonstrated in a setup where a cell phone interferes with a pressure sensor application. the application is show in figure 33 . this application needs two op amps. the op amp configured as a buffer and connected at the negative output of the pressure sensor prevents the loading of the bridge by resistor r2. the buffer also prevents the resistors of the sensor from affecting the gain of the following gain stage. the op amps are placed in a single supply configuration. the experiment is performed on two different op amps: a typical standard op amp and the lmv881 emi hardened op amp. a cell phone is placed on a fixed position a couple of centimeters from the op amps in the sensor circuit. when the cell phone is called, the pcb and wiring connected to the op amps receive the rf signal. subsequently, the op amps detect the rf voltages and currents that end up at their pins. the resulting effect on the output of the second op amp is shown in figure 32 . 16 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 + - r 1 50 : rfin c 1 22 pf c 2 10 f 100 pf v dd v ss out + c 3 100 pf 10 f + c 4 c 5
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 figure 32. comparing emi robustness the difference between the two types of op amps is clearly visible. the typical standard op amp has an output shift (disturbed signal) larger than 1v as a result of the rf signal transmitted by the cell phone. the lmv881 emi hardened op amp does not show any significant disturbances. this means that the rf signal will not disturb the signal entering the adc when using the lmv881. figure 33. pressure sensor application decoupling and layout care must be given when creating a board layout for the op amp. for decoupling the supply lines it is suggested that 10 nf capacitors be placed as close as possible to the op amp. for single supply, place a capacitor between v + and v ? . for dual supplies, place one capacitor between v + and the board ground, and a second capacitor between ground and v ? . even with the lmv881 inherent hardening against emi, it is still recommended to keep the input traces short and as far as possible from rf sources. then the rf signals entering the chip are as low as possible and the remaining emi can be almost, completely eliminated in the chip by the emi reducing features of the lmv881 . most of the emi will be shunted out to the supply pins, so the supply pins should have bypassing and grounding suitable well up into the gigahertz range. a small 100pf rf grade capacitor directly from the supply pin to the nearest suitable rf ground is recommended. load cell sensor application the lmv881 can be used for weight measuring system applications which use a load cell sensor. examples of such systems are: bathroom weight scales, industrial weight scales and weight measurement devices on moving equipment such as forklift trucks. the following example describes a typical load cell sensor application that can be used as a starting point for many different types of sensors and applications. applications in environments where emi may appear would especially benefit from the emirr performance of the lmv881 . copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 17 product folder links: lmv881 + - + - adc pressure sensor + - r2 100 : r1 2.4 k : v dd v dd lmv881 lmv881 v out time (0.5s/div) v out (0.5v/div) typical opamp lmv881
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com load cell characteristics the load cell used in this example is a wheatstone bridge. the value of the resistors in the bridge changes when pressure is applied to the sensor. this change of the resistor values will result in a differential output voltage depending on the sensitivity of the sensor, the used supply voltage and the applied pressure. the difference between the output at full scale pressure and the output at zero pressure is defined as the span of the load cell. a typical value for the span is 10 mv/v. the circuit configuration should be chosen such that loading of the sensor is prevented. loading of the resistor bridge due to the circuit following the sensor, could result in incorrect output voltages of the sensor. load cell example figure 34 shows a typical schematic for a load cell application. it uses a single supply and has an adjustment for both positive and negative offset of the load cell. an adc converts the amplified signal to a digital signal. the op amps a1 and a2 are configured as buffers, and are connected at both the positive and the negative output of the load cell. this is to prevent the loading of the resistor bridge in the sensor by the resistors configuring the differential op amp circuit (op amp a4). the buffers also prevent the resistors of the sensor from affecting the gain of the following gain stage. the third buffer (a3) is used to create a reference voltage, to correct for the offset in the system. given the differential output voltage v sense of the load cell the output signal of this op amp configuration, v out , equals: (2) to align the pressure range with the full range of an adc the correct gain needs to be set. to calculate the correct gain, the power supply voltage and the span of the load cell are needed. for this example a power supply of 5v is used and the span of the sensor, in this case a 125 kg sensor, is 100 mv. with the configuration as shown in figure 34 , this signal is covering almost the full input range of the adc. with no weight on the load cell, the output of the sensor and the op amp a4 will be close to 0v. with the full weight on the load cell, the output of the sensor is 100 mv, and will be amplified with the gain from the configuration. in the case of the configuration of figure 34 the gain is r3/r1 = 5 k ? /100 ? = 50. this will result in a maximum output of 100 mv x 50 = 5v, which covers the full range of the adc. for further processing the digital signal can be processed by a microprocessor following the adc, this can be used to display or log the weight on the load cell. to get a resolution of 0.5 kg, the lsb of the adc should be smaller then 0.5 kg/125 kg = 1/1000. a 12-bit adc would be sufficient as this gives 4096 steps. a 12-bit adc such as the two channel 12-bit adc122s021 can be used for this application. 18 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881 r1 r3 x v sense + r5 r3 ? x v dd ? - = + 1 x v ref r5 r3 v out
lmv881 www.ti.com snosc62b ? january 2012 ? revised may 2013 figure 34. load cell application evaluation board the lmv881 has a multi-function evaluation board available for ease of bench testing and prototyping. the board has a separate users guide that describes the various configurations. the boards can be ordered through the web or through your local representative. device package evaluation board part number lmv881 uqfn lmv881eval copyright ? 2012 ? 2013, texas instruments incorporated submit documentation feedback 19 product folder links: lmv881 + - + - adc load cell + - r1 100 : r3 5 k : v dd v dd lmv881 lmv881 v out + - lmv881 r2 100 : r4 5 k : + - lmv881 v dd v dd r5 5 k : r6 80 k : p1 20 k : a1 a2 a3 a4 r6 80 k : v ref v sense
lmv881 snosc62b ? january 2012 ? revised may 2013 www.ti.com revision history changes from revision a (may 2013) to revision b page ? changed layout of national data sheet to ti format .......................................................................................................... 19 20 submit documentation feedback copyright ? 2012 ? 2013, texas instruments incorporated product folder links: lmv881
package option addendum www.ti.com 7-jul-2016 addendum-page 1 packaging information orderable device status (1) package type package drawing pins package qty eco plan (2) lead/ball finish (6) msl peak temp (3) op temp (c) device marking (4/5) samples lmv881le/nopb active uson nkk 6 1000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 lmv881lee/nopb active uson nkk 6 250 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 lmv881lex/nopb active uson nkk 6 3000 green (rohs & no sb/br) cu sn level-1-260c-unlim -40 to 125 (1) the marketing status values are defined as follows: active: product device recommended for new designs. lifebuy: ti has announced that the device will be discontinued, and a lifetime-buy period is in effect. nrnd: not recommended for new designs. device is in production to support existing customers, but ti does not recommend using this part in a new design. preview: device has been announced but is not in production. samples may or may not be available. obsolete: ti has discontinued the production of the device. (2) eco plan - the planned eco-friendly classification: pb-free (rohs), pb-free (rohs exempt), or green (rohs & no sb/br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. tbd: the pb-free/green conversion plan has not been defined. pb-free (rohs): ti's terms "lead-free" or "pb-free" mean semiconductor products that are compatible with the current rohs requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. where designed to be soldered at high temperatures, ti pb-free products are suitable for use in specified lead-free processes. pb-free (rohs exempt): this component has a rohs exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. the component is otherwise considered pb-free (rohs compatible) as defined above. green (rohs & no sb/br): ti defines "green" to mean pb-free (rohs compatible), and free of bromine (br) and antimony (sb) based flame retardants (br or sb do not exceed 0.1% by weight in homogeneous material) (3) msl, peak temp. - the moisture sensitivity level rating according to the jedec industry standard classifications, and peak solder temperature. (4) there may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) multiple device markings will be inside parentheses. only one device marking contained in parentheses and separated by a "~" will appear on a device. if a line is indented then it is a continuation of the previous line and the two combined represent the entire device marking for that device. (6) lead/ball finish - orderable devices may have multiple material finish options. finish options are separated by a vertical ruled line. lead/ball finish values may wrap to two lines if the finish value exceeds the maximum column width. important information and disclaimer: the information provided on this page represents ti's knowledge and belief as of the date that it is provided. ti bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. efforts are underway to better integrate information from third parties. ti has taken and
package option addendum www.ti.com 7-jul-2016 addendum-page 2 continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ti and ti suppliers consider certain information to be proprietary, and thus cas numbers and other limited information may not be available for release. in no event shall ti's liability arising out of such information exceed the total purchase price of the ti part(s) at issue in this document sold by ti to customer on an annual basis.
tape and reel information *all dimensions are nominal device package type package drawing pins spq reel diameter (mm) reel width w1 (mm) a0 (mm) b0 (mm) k0 (mm) p1 (mm) w (mm) pin1 quadrant lmv881le/nopb uson nkk 6 1000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 q1 lmv881lee/nopb uson nkk 6 250 180.0 9.5 1.15 1.6 0.75 4.0 8.0 q1 lmv881lex/nopb uson nkk 6 3000 180.0 9.5 1.15 1.6 0.75 4.0 8.0 q1 package materials information www.ti.com 18-jul-2015 pack materials-page 1
*all dimensions are nominal device package type package drawing pins spq length (mm) width (mm) height (mm) lmv881le/nopb uson nkk 6 1000 184.0 184.0 19.0 lmv881lee/nopb uson nkk 6 250 184.0 184.0 19.0 lmv881lex/nopb uson nkk 6 3000 184.0 184.0 19.0 package materials information www.ti.com 18-jul-2015 pack materials-page 2
mechanical da t a nkk 000 6a www .ti.com l e h 0 6 a ( r e v a ) t op side of p acka ge bo t t om side of p acka ge
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